00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021 #ifndef __LPC23xx_H
00022 #define __LPC23xx_H
00023
00024
00025 #define VIC_BASE_ADDR 0xFFFFF000
00026 #define VICIRQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x000))
00027 #define VICFIQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x004))
00028 #define VICRawIntr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x008))
00029 #define VICIntSelect (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x00C))
00030 #define VICIntEnable (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x010))
00031 #define VICIntEnClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x014))
00032 #define VICSoftInt (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x018))
00033 #define VICSoftIntClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x01C))
00034 #define VICProtection (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x020))
00035 #define VICSWPrioMask (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x024))
00036
00037 #define VICVectAddr0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x100))
00038 #define VICVectAddr1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x104))
00039 #define VICVectAddr2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x108))
00040 #define VICVectAddr3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x10C))
00041 #define VICVectAddr4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x110))
00042 #define VICVectAddr5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x114))
00043 #define VICVectAddr6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x118))
00044 #define VICVectAddr7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x11C))
00045 #define VICVectAddr8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x120))
00046 #define VICVectAddr9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x124))
00047 #define VICVectAddr10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x128))
00048 #define VICVectAddr11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x12C))
00049 #define VICVectAddr12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x130))
00050 #define VICVectAddr13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x134))
00051 #define VICVectAddr14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x138))
00052 #define VICVectAddr15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x13C))
00053 #define VICVectAddr16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x140))
00054 #define VICVectAddr17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x144))
00055 #define VICVectAddr18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x148))
00056 #define VICVectAddr19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x14C))
00057 #define VICVectAddr20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x150))
00058 #define VICVectAddr21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x154))
00059 #define VICVectAddr22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x158))
00060 #define VICVectAddr23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x15C))
00061 #define VICVectAddr24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x160))
00062 #define VICVectAddr25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x164))
00063 #define VICVectAddr26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x168))
00064 #define VICVectAddr27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x16C))
00065 #define VICVectAddr28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x170))
00066 #define VICVectAddr29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x174))
00067 #define VICVectAddr30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x178))
00068 #define VICVectAddr31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x17C))
00069
00070
00071
00072 #define VICVectCntl0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200))
00073 #define VICVectCntl1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204))
00074 #define VICVectCntl2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208))
00075 #define VICVectCntl3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C))
00076 #define VICVectCntl4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210))
00077 #define VICVectCntl5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214))
00078 #define VICVectCntl6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218))
00079 #define VICVectCntl7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C))
00080 #define VICVectCntl8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220))
00081 #define VICVectCntl9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224))
00082 #define VICVectCntl10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228))
00083 #define VICVectCntl11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C))
00084 #define VICVectCntl12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230))
00085 #define VICVectCntl13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234))
00086 #define VICVectCntl14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238))
00087 #define VICVectCntl15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C))
00088 #define VICVectCntl16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240))
00089 #define VICVectCntl17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244))
00090 #define VICVectCntl18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248))
00091 #define VICVectCntl19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C))
00092 #define VICVectCntl20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250))
00093 #define VICVectCntl21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254))
00094 #define VICVectCntl22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258))
00095 #define VICVectCntl23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C))
00096 #define VICVectCntl24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260))
00097 #define VICVectCntl25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264))
00098 #define VICVectCntl26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268))
00099 #define VICVectCntl27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C))
00100 #define VICVectCntl28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270))
00101 #define VICVectCntl29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274))
00102 #define VICVectCntl30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278))
00103 #define VICVectCntl31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C))
00104
00105
00106 #define VICVectPriority0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200))
00107 #define VICVectPriority1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204))
00108 #define VICVectPriority2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208))
00109 #define VICVectPriority3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C))
00110 #define VICVectPriority4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210))
00111 #define VICVectPriority5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214))
00112 #define VICVectPriority6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218))
00113 #define VICVectPriority7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C))
00114 #define VICVectPriority8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220))
00115 #define VICVectPriority9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224))
00116 #define VICVectPriority10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228))
00117 #define VICVectPriority11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C))
00118 #define VICVectPriority12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230))
00119 #define VICVectPriority13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234))
00120 #define VICVectPriority14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238))
00121 #define VICVectPriority15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C))
00122 #define VICVectPriority16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240))
00123 #define VICVectPriority17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244))
00124 #define VICVectPriority18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248))
00125 #define VICVectPriority19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C))
00126 #define VICVectPriority20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250))
00127 #define VICVectPriority21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254))
00128 #define VICVectPriority22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258))
00129 #define VICVectPriority23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C))
00130 #define VICVectPriority24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260))
00131 #define VICVectPriority25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264))
00132 #define VICVectPriority26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268))
00133 #define VICVectPriority27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C))
00134 #define VICVectPriority28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270))
00135 #define VICVectPriority29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274))
00136 #define VICVectPriority30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278))
00137 #define VICVectPriority31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C))
00138
00139 #define VICVectAddr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0xF00))
00140
00141
00142
00143 #define PINSEL_BASE_ADDR 0xE002C000
00144 #define PINSEL0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x00))
00145 #define PINSEL1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x04))
00146 #define PINSEL2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x08))
00147 #define PINSEL3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x0C))
00148 #define PINSEL4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x10))
00149 #define PINSEL5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x14))
00150 #define PINSEL6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x18))
00151 #define PINSEL7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x1C))
00152 #define PINSEL8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x20))
00153 #define PINSEL9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x24))
00154 #define PINSEL10 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x28))
00155
00156 #define PINMODE0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x40))
00157 #define PINMODE1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x44))
00158 #define PINMODE2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x48))
00159 #define PINMODE3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x4C))
00160 #define PINMODE4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x50))
00161 #define PINMODE5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x54))
00162 #define PINMODE6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x58))
00163 #define PINMODE7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x5C))
00164 #define PINMODE8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x60))
00165 #define PINMODE9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x64))
00166
00167
00168 #define GPIO_BASE_ADDR 0xE0028000
00169 #define IOPIN0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x00))
00170 #define IOSET0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x04))
00171 #define IODIR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x08))
00172 #define IOCLR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x0C))
00173 #define IOPIN1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x10))
00174 #define IOSET1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x14))
00175 #define IODIR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x18))
00176 #define IOCLR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x1C))
00177
00178
00179 #define IO0_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x90))
00180 #define IO0_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x94))
00181 #define IO0_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x84))
00182 #define IO0_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x88))
00183 #define IO0_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x8C))
00184
00185 #define IO2_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB0))
00186 #define IO2_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB4))
00187 #define IO2_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA4))
00188 #define IO2_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA8))
00189 #define IO2_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xAC))
00190
00191 #define IO_INT_STAT (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x80))
00192
00193 #define PARTCFG_BASE_ADDR 0x3FFF8000
00194 #define PARTCFG (*(volatile unsigned int *)(PARTCFG_BASE_ADDR + 0x00))
00195
00196
00197 #define FIO_BASE_ADDR 0x3FFFC000
00198 #define FIO0DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x00))
00199 #define FIO0MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x10))
00200 #define FIO0PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x14))
00201 #define FIO0SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x18))
00202 #define FIO0CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x1C))
00203
00204 #define FIO1DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x20))
00205 #define FIO1MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x30))
00206 #define FIO1PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x34))
00207 #define FIO1SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x38))
00208 #define FIO1CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x3C))
00209
00210 #define FIO2DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x40))
00211 #define FIO2MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x50))
00212 #define FIO2PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x54))
00213 #define FIO2SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x58))
00214 #define FIO2CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x5C))
00215
00216 #define FIO3DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x60))
00217 #define FIO3MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x70))
00218 #define FIO3PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x74))
00219 #define FIO3SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x78))
00220 #define FIO3CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x7C))
00221
00222 #define FIO4DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x80))
00223 #define FIO4MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x90))
00224 #define FIO4PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x94))
00225 #define FIO4SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x98))
00226 #define FIO4CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x9C))
00227
00228
00229 #define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01))
00230 #define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
00231 #define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41))
00232 #define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61))
00233 #define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81))
00234
00235 #define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02))
00236 #define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22))
00237 #define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42))
00238 #define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62))
00239 #define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82))
00240
00241 #define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03))
00242 #define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23))
00243 #define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43))
00244 #define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63))
00245 #define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83))
00246
00247 #define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x04))
00248 #define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x24))
00249 #define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x44))
00250 #define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x64))
00251 #define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x84))
00252
00253 #define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00))
00254 #define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20))
00255 #define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40))
00256 #define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60))
00257 #define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80))
00258
00259 #define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02))
00260 #define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22))
00261 #define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42))
00262 #define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62))
00263 #define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82))
00264
00265 #define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10))
00266 #define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30))
00267 #define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50))
00268 #define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70))
00269 #define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90))
00270
00271 #define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11))
00272 #define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
00273 #define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51))
00274 #define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71))
00275 #define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91))
00276
00277 #define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12))
00278 #define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32))
00279 #define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52))
00280 #define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72))
00281 #define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92))
00282
00283 #define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13))
00284 #define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33))
00285 #define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53))
00286 #define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73))
00287 #define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93))
00288
00289 #define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10))
00290 #define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30))
00291 #define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50))
00292 #define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70))
00293 #define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90))
00294
00295 #define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12))
00296 #define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32))
00297 #define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52))
00298 #define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72))
00299 #define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92))
00300
00301 #define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14))
00302 #define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34))
00303 #define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54))
00304 #define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74))
00305 #define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94))
00306
00307 #define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15))
00308 #define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25))
00309 #define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55))
00310 #define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75))
00311 #define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95))
00312
00313 #define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16))
00314 #define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36))
00315 #define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56))
00316 #define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76))
00317 #define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96))
00318
00319 #define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17))
00320 #define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37))
00321 #define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57))
00322 #define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77))
00323 #define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97))
00324
00325 #define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14))
00326 #define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34))
00327 #define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54))
00328 #define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74))
00329 #define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94))
00330
00331 #define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16))
00332 #define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36))
00333 #define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56))
00334 #define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76))
00335 #define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96))
00336
00337 #define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18))
00338 #define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38))
00339 #define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58))
00340 #define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78))
00341 #define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98))
00342
00343 #define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19))
00344 #define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29))
00345 #define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59))
00346 #define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79))
00347 #define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99))
00348
00349 #define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A))
00350 #define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A))
00351 #define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A))
00352 #define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A))
00353 #define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A))
00354
00355 #define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B))
00356 #define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B))
00357 #define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B))
00358 #define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B))
00359 #define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B))
00360
00361 #define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18))
00362 #define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38))
00363 #define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58))
00364 #define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78))
00365 #define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98))
00366
00367 #define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A))
00368 #define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A))
00369 #define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A))
00370 #define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A))
00371 #define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A))
00372
00373 #define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C))
00374 #define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C))
00375 #define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C))
00376 #define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C))
00377 #define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C))
00378
00379 #define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D))
00380 #define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D))
00381 #define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D))
00382 #define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D))
00383 #define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D))
00384
00385 #define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E))
00386 #define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E))
00387 #define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E))
00388 #define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E))
00389 #define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E))
00390
00391 #define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F))
00392 #define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F))
00393 #define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F))
00394 #define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F))
00395 #define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F))
00396
00397 #define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C))
00398 #define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C))
00399 #define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C))
00400 #define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C))
00401 #define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C))
00402
00403 #define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E))
00404 #define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E))
00405 #define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E))
00406 #define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E))
00407 #define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E))
00408
00409
00410
00411
00412
00413 #define SCB_BASE_ADDR 0xE01FC000
00414
00415
00416 #define MAMCR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x000))
00417 #define MAMTIM (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x004))
00418 #define MEMMAP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x040))
00419
00420
00421 #define PLLCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x080))
00422 #define PLLCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x084))
00423 #define PLLSTAT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x088))
00424 #define PLLFEED (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x08C))
00425
00426
00427 #define PCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C0))
00428 #define PCONP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C4))
00429
00430
00431
00432 #define CCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x104))
00433 #define USBCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x108))
00434 #define CLKSRCSEL (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x10C))
00435 #define PCLKSEL0 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A8))
00436 #define PCLKSEL1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1AC))
00437
00438
00439 #define EXTINT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x140))
00440 #define INTWAKE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x144))
00441 #define EXTMODE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x148))
00442 #define EXTPOLAR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x14C))
00443
00444
00445 #define RSIR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x180))
00446
00447
00448 #define CSPR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x184))
00449
00450
00451 #define AHBCFG1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x188))
00452 #define AHBCFG2 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x18C))
00453
00454
00455 #define SCS (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A0))
00456
00457
00458 #define STATIC_MEM0_BASE 0x80000000
00459 #define STATIC_MEM1_BASE 0x81000000
00460 #define STATIC_MEM2_BASE 0x82000000
00461 #define STATIC_MEM3_BASE 0x83000000
00462
00463 #define DYNAMIC_MEM0_BASE 0xA0000000
00464 #define DYNAMIC_MEM1_BASE 0xB0000000
00465 #define DYNAMIC_MEM2_BASE 0xC0000000
00466 #define DYNAMIC_MEM3_BASE 0xD0000000
00467
00468
00469 #define EMC_BASE_ADDR 0xFFE08000
00470 #define EMC_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x000))
00471 #define EMC_STAT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x004))
00472 #define EMC_CONFIG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x008))
00473
00474
00475 #define EMC_DYN_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x020))
00476 #define EMC_DYN_RFSH (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x024))
00477 #define EMC_DYN_RD_CFG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x028))
00478 #define EMC_DYN_RP (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x030))
00479 #define EMC_DYN_RAS (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x034))
00480 #define EMC_DYN_SREX (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x038))
00481 #define EMC_DYN_APR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x03C))
00482 #define EMC_DYN_DAL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x040))
00483 #define EMC_DYN_WR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x044))
00484 #define EMC_DYN_RC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x048))
00485 #define EMC_DYN_RFC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x04C))
00486 #define EMC_DYN_XSR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x050))
00487 #define EMC_DYN_RRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x054))
00488 #define EMC_DYN_MRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x058))
00489
00490 #define EMC_DYN_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x100))
00491 #define EMC_DYN_RASCAS0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x104))
00492 #define EMC_DYN_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x140))
00493 #define EMC_DYN_RASCAS1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x144))
00494 #define EMC_DYN_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x160))
00495 #define EMC_DYN_RASCAS2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x164))
00496 #define EMC_DYN_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x180))
00497 #define EMC_DYN_RASCAS3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x184))
00498
00499
00500 #define EMC_STA_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x200))
00501 #define EMC_STA_WAITWEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x204))
00502 #define EMC_STA_WAITOEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x208))
00503 #define EMC_STA_WAITRD0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x20C))
00504 #define EMC_STA_WAITPAGE0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x210))
00505 #define EMC_STA_WAITWR0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x214))
00506 #define EMC_STA_WAITTURN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x218))
00507
00508 #define EMC_STA_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x220))
00509 #define EMC_STA_WAITWEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x224))
00510 #define EMC_STA_WAITOEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x228))
00511 #define EMC_STA_WAITRD1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x22C))
00512 #define EMC_STA_WAITPAGE1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x230))
00513 #define EMC_STA_WAITWR1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x234))
00514 #define EMC_STA_WAITTURN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x238))
00515
00516 #define EMC_STA_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x240))
00517 #define EMC_STA_WAITWEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x244))
00518 #define EMC_STA_WAITOEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x248))
00519 #define EMC_STA_WAITRD2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x24C))
00520 #define EMC_STA_WAITPAGE2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x250))
00521 #define EMC_STA_WAITWR2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x254))
00522 #define EMC_STA_WAITTURN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x258))
00523
00524 #define EMC_STA_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x260))
00525 #define EMC_STA_WAITWEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x264))
00526 #define EMC_STA_WAITOEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x268))
00527 #define EMC_STA_WAITRD3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x26C))
00528 #define EMC_STA_WAITPAGE3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x270))
00529 #define EMC_STA_WAITWR3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x274))
00530 #define EMC_STA_WAITTURN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x278))
00531
00532 #define EMC_STA_EXT_WAIT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x880))
00533
00534
00535
00536 #define TMR0_BASE_ADDR 0xE0004000
00537 #define T0IR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x00))
00538 #define T0TCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x04))
00539 #define T0TC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x08))
00540 #define T0PR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x0C))
00541 #define T0PC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x10))
00542 #define T0MCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x14))
00543 #define T0MR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x18))
00544 #define T0MR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x1C))
00545 #define T0MR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x20))
00546 #define T0MR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x24))
00547 #define T0CCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x28))
00548 #define T0CR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x2C))
00549 #define T0CR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x30))
00550 #define T0CR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x34))
00551 #define T0CR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x38))
00552 #define T0EMR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x3C))
00553 #define T0CTCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x70))
00554
00555
00556 #define TMR1_BASE_ADDR 0xE0008000
00557 #define T1IR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x00))
00558 #define T1TCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x04))
00559 #define T1TC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x08))
00560 #define T1PR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x0C))
00561 #define T1PC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x10))
00562 #define T1MCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x14))
00563 #define T1MR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x18))
00564 #define T1MR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x1C))
00565 #define T1MR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x20))
00566 #define T1MR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x24))
00567 #define T1CCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x28))
00568 #define T1CR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x2C))
00569 #define T1CR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x30))
00570 #define T1CR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x34))
00571 #define T1CR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x38))
00572 #define T1EMR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x3C))
00573 #define T1CTCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x70))
00574
00575
00576 #define TMR2_BASE_ADDR 0xE0070000
00577 #define T2IR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x00))
00578 #define T2TCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x04))
00579 #define T2TC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x08))
00580 #define T2PR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x0C))
00581 #define T2PC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x10))
00582 #define T2MCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x14))
00583 #define T2MR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x18))
00584 #define T2MR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x1C))
00585 #define T2MR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x20))
00586 #define T2MR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x24))
00587 #define T2CCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x28))
00588 #define T2CR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x2C))
00589 #define T2CR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x30))
00590 #define T2CR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x34))
00591 #define T2CR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x38))
00592 #define T2EMR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x3C))
00593 #define T2CTCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x70))
00594
00595
00596 #define TMR3_BASE_ADDR 0xE0074000
00597 #define T3IR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x00))
00598 #define T3TCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x04))
00599 #define T3TC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x08))
00600 #define T3PR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x0C))
00601 #define T3PC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x10))
00602 #define T3MCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x14))
00603 #define T3MR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x18))
00604 #define T3MR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x1C))
00605 #define T3MR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x20))
00606 #define T3MR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x24))
00607 #define T3CCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x28))
00608 #define T3CR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x2C))
00609 #define T3CR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x30))
00610 #define T3CR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x34))
00611 #define T3CR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x38))
00612 #define T3EMR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x3C))
00613 #define T3CTCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x70))
00614
00615
00616
00617 #define PWM0_BASE_ADDR 0xE0014000
00618 #define PWM0IR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x00))
00619 #define PWM0TCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x04))
00620 #define PWM0TC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x08))
00621 #define PWM0PR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x0C))
00622 #define PWM0PC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x10))
00623 #define PWM0MCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x14))
00624 #define PWM0MR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x18))
00625 #define PWM0MR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x1C))
00626 #define PWM0MR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x20))
00627 #define PWM0MR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x24))
00628 #define PWM0CCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x28))
00629 #define PWM0CR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x2C))
00630 #define PWM0CR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x30))
00631 #define PWM0CR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x34))
00632 #define PWM0CR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x38))
00633 #define PWM0EMR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x3C))
00634 #define PWM0MR4 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x40))
00635 #define PWM0MR5 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x44))
00636 #define PWM0MR6 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x48))
00637 #define PWM0PCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x4C))
00638 #define PWM0LER (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x50))
00639 #define PWM0CTCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x70))
00640
00641 #define PWM1_BASE_ADDR 0xE0018000
00642 #define PWM1IR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x00))
00643 #define PWM1TCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x04))
00644 #define PWM1TC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x08))
00645 #define PWM1PR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x0C))
00646 #define PWM1PC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x10))
00647 #define PWM1MCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x14))
00648 #define PWM1MR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x18))
00649 #define PWM1MR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x1C))
00650 #define PWM1MR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x20))
00651 #define PWM1MR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x24))
00652 #define PWM1CCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x28))
00653 #define PWM1CR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x2C))
00654 #define PWM1CR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x30))
00655 #define PWM1CR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x34))
00656 #define PWM1CR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x38))
00657 #define PWM1EMR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x3C))
00658 #define PWM1MR4 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x40))
00659 #define PWM1MR5 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x44))
00660 #define PWM1MR6 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x48))
00661 #define PWM1PCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x4C))
00662 #define PWM1LER (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x50))
00663 #define PWM1CTCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x70))
00664
00665
00666
00667 #define UART0_BASE_ADDR 0xE000C000
00668 #define U0RBR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
00669 #define U0THR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
00670 #define U0DLL (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
00671 #define U0DLM (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
00672 #define U0IER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
00673 #define U0IIR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
00674 #define U0FCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
00675 #define U0LCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x0C))
00676 #define U0LSR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x14))
00677 #define U0SCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x1C))
00678 #define U0ACR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x20))
00679 #define U0ICR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x24))
00680 #define U0FDR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x28))
00681 #define U0TER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x30))
00682
00683
00684 #define UART1_BASE_ADDR 0xE0010000
00685 #define U1RBR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
00686 #define U1THR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
00687 #define U1DLL (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
00688 #define U1DLM (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
00689 #define U1IER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
00690 #define U1IIR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
00691 #define U1FCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
00692 #define U1LCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x0C))
00693 #define U1MCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x10))
00694 #define U1LSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x14))
00695 #define U1MSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x18))
00696 #define U1SCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x1C))
00697 #define U1ACR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x20))
00698 #define U1FDR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x28))
00699 #define U1TER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x30))
00700
00701
00702 #define UART2_BASE_ADDR 0xE0078000
00703 #define U2RBR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
00704 #define U2THR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
00705 #define U2DLL (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
00706 #define U2DLM (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
00707 #define U2IER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
00708 #define U2IIR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
00709 #define U2FCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
00710 #define U2LCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x0C))
00711 #define U2LSR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x14))
00712 #define U2SCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x1C))
00713 #define U2ACR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x20))
00714 #define U2ICR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x24))
00715 #define U2FDR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x28))
00716 #define U2TER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x30))
00717
00718
00719 #define UART3_BASE_ADDR 0xE007C000
00720 #define U3RBR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
00721 #define U3THR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
00722 #define U3DLL (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
00723 #define U3DLM (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
00724 #define U3IER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
00725 #define U3IIR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
00726 #define U3FCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
00727 #define U3LCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x0C))
00728 #define U3LSR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x14))
00729 #define U3SCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x1C))
00730 #define U3ACR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x20))
00731 #define U3ICR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x24))
00732 #define U3FDR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x28))
00733 #define U3TER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x30))
00734
00735
00736 #define I2C0_BASE_ADDR 0xE001C000
00737 #define I20CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
00738 #define I20STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
00739 #define I20DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
00740 #define I20ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
00741 #define I20SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
00742 #define I20SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
00743 #define I20CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
00744
00745 #define I2C0CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
00746 #define I2C0STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
00747 #define I2C0DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
00748 #define I2C0ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
00749 #define I2C0SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
00750 #define I2C0SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
00751 #define I2C0CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
00752
00753
00754
00755 #define I2C1_BASE_ADDR 0xE005C000
00756 #define I21CONSET (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x00))
00757 #define I21STAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x04))
00758 #define I21DAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x08))
00759 #define I21ADR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x0C))
00760 #define I21SCLH (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x10))
00761 #define I21SCLL (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x14))
00762 #define I21CONCLR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x18))
00763
00764
00765 #define I2C2_BASE_ADDR 0xE0080000
00766 #define I22CONSET (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x00))
00767 #define I22STAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x04))
00768 #define I22DAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x08))
00769 #define I22ADR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x0C))
00770 #define I22SCLH (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x10))
00771 #define I22SCLL (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x14))
00772 #define I22CONCLR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x18))
00773
00774
00775 #define SPI0_BASE_ADDR 0xE0020000
00776 #define S0SPCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x00))
00777 #define S0SPSR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x04))
00778 #define S0SPDR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x08))
00779 #define S0SPCCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x0C))
00780 #define S0SPINT (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x1C))
00781
00782
00783 #define SSP0_BASE_ADDR 0xE0068000
00784 #define SSP0CR0 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x00))
00785 #define SSP0CR1 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x04))
00786 #define SSP0DR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x08))
00787 #define SSP0SR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x0C))
00788 #define SSP0CPSR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x10))
00789 #define SSP0IMSC (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x14))
00790 #define SSP0RIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x18))
00791 #define SSP0MIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x1C))
00792 #define SSP0ICR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x20))
00793 #define SSP0DMACR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x24))
00794
00795
00796 #define SSP1_BASE_ADDR 0xE0030000
00797 #define SSP1CR0 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x00))
00798 #define SSP1CR1 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x04))
00799 #define SSP1DR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x08))
00800 #define SSP1SR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x0C))
00801 #define SSP1CPSR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x10))
00802 #define SSP1IMSC (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x14))
00803 #define SSP1RIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x18))
00804 #define SSP1MIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x1C))
00805 #define SSP1ICR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x20))
00806 #define SSP1DMACR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x24))
00807
00808
00809
00810 #define RTC_BASE_ADDR 0xE0024000
00811 #define RTC_ILR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x00))
00812 #define RTC_CTC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x04))
00813 #define RTC_CCR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x08))
00814 #define RTC_CIIR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x0C))
00815 #define RTC_AMR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x10))
00816 #define RTC_CTIME0 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x14))
00817 #define RTC_CTIME1 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x18))
00818 #define RTC_CTIME2 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x1C))
00819 #define RTC_SEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x20))
00820 #define RTC_MIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x24))
00821 #define RTC_HOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x28))
00822 #define RTC_DOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x2C))
00823 #define RTC_DOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x30))
00824 #define RTC_DOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x34))
00825 #define RTC_MONTH (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x38))
00826 #define RTC_YEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x3C))
00827 #define RTC_CISS (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x40))
00828 #define RTC_ALSEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x60))
00829 #define RTC_ALMIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x64))
00830 #define RTC_ALHOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x68))
00831 #define RTC_ALDOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x6C))
00832 #define RTC_ALDOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x70))
00833 #define RTC_ALDOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x74))
00834 #define RTC_ALMON (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x78))
00835 #define RTC_ALYEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x7C))
00836 #define RTC_PREINT (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x80))
00837 #define RTC_PREFRAC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x84))
00838
00839
00840
00841 #define AD0_BASE_ADDR 0xE0034000
00842 #define AD0CR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x00))
00843 #define AD0GDR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x04))
00844 #define AD0INTEN (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x0C))
00845 #define AD0DR0 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x10))
00846 #define AD0DR1 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x14))
00847 #define AD0DR2 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x18))
00848 #define AD0DR3 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x1C))
00849 #define AD0DR4 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x20))
00850 #define AD0DR5 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x24))
00851 #define AD0DR6 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x28))
00852 #define AD0DR7 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x2C))
00853 #define AD0STAT (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x30))
00854
00855
00856
00857 #define DAC_BASE_ADDR 0xE006C000
00858 #define DACR (*(volatile unsigned int *)(DAC_BASE_ADDR + 0x00))
00859
00860
00861
00862 #define WDG_BASE_ADDR 0xE0000000
00863 #define WDMOD (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x00))
00864 #define WDTC (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x04))
00865 #define WDFEED (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x08))
00866 #define WDTV (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x0C))
00867 #define WDCLKSEL (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x10))
00868
00869
00870 #define CAN_ACCEPT_BASE_ADDR 0xE003C000
00871 #define CAN_AFMR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x00))
00872 #define CAN_SFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x04))
00873 #define CAN_SFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x08))
00874 #define CAN_EFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x0C))
00875 #define CAN_EFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x10))
00876 #define CAN_EOT (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x14))
00877 #define CAN_LUT_ERR_ADR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x18))
00878 #define CAN_LUT_ERR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x1C))
00879
00880 #define CAN_CENTRAL_BASE_ADDR 0xE0040000
00881 #define CAN_TX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x00))
00882 #define CAN_RX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x04))
00883 #define CAN_MSR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x08))
00884
00885 #define CAN1_BASE_ADDR 0xE0044000
00886 #define CAN1MOD (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x00))
00887 #define CAN1CMR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x04))
00888 #define CAN1GSR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x08))
00889 #define CAN1ICR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x0C))
00890 #define CAN1IER (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x10))
00891 #define CAN1BTR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x14))
00892 #define CAN1EWL (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x18))
00893 #define CAN1SR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x1C))
00894 #define CAN1RFS (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x20))
00895 #define CAN1RID (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x24))
00896 #define CAN1RDA (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x28))
00897 #define CAN1RDB (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x2C))
00898
00899 #define CAN1TFI1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x30))
00900 #define CAN1TID1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x34))
00901 #define CAN1TDA1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x38))
00902 #define CAN1TDB1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x3C))
00903 #define CAN1TFI2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x40))
00904 #define CAN1TID2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x44))
00905 #define CAN1TDA2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x48))
00906 #define CAN1TDB2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x4C))
00907 #define CAN1TFI3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x50))
00908 #define CAN1TID3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x54))
00909 #define CAN1TDA3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x58))
00910 #define CAN1TDB3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x5C))
00911
00912 #define CAN2_BASE_ADDR 0xE0048000
00913 #define CAN2MOD (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x00))
00914 #define CAN2CMR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x04))
00915 #define CAN2GSR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x08))
00916 #define CAN2ICR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x0C))
00917 #define CAN2IER (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x10))
00918 #define CAN2BTR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x14))
00919 #define CAN2EWL (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x18))
00920 #define CAN2SR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x1C))
00921 #define CAN2RFS (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x20))
00922 #define CAN2RID (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x24))
00923 #define CAN2RDA (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x28))
00924 #define CAN2RDB (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x2C))
00925
00926 #define CAN2TFI1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x30))
00927 #define CAN2TID1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x34))
00928 #define CAN2TDA1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x38))
00929 #define CAN2TDB1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x3C))
00930 #define CAN2TFI2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x40))
00931 #define CAN2TID2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x44))
00932 #define CAN2TDA2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x48))
00933 #define CAN2TDB2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x4C))
00934 #define CAN2TFI3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x50))
00935 #define CAN2TID3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x54))
00936 #define CAN2TDA3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x58))
00937 #define CAN2TDB3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x5C))
00938
00939
00940
00941 #define MCI_BASE_ADDR 0xE008C000
00942 #define MCI_POWER (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x00))
00943 #define MCI_CLOCK (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x04))
00944 #define MCI_ARGUMENT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x08))
00945 #define MCI_COMMAND (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x0C))
00946 #define MCI_RESP_CMD (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x10))
00947 #define MCI_RESP0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x14))
00948 #define MCI_RESP1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x18))
00949 #define MCI_RESP2 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x1C))
00950 #define MCI_RESP3 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x20))
00951 #define MCI_DATA_TMR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x24))
00952 #define MCI_DATA_LEN (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x28))
00953 #define MCI_DATA_CTRL (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x2C))
00954 #define MCI_DATA_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x30))
00955 #define MCI_STATUS (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x34))
00956 #define MCI_CLEAR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x38))
00957 #define MCI_MASK0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x3C))
00958 #define MCI_MASK1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x40))
00959 #define MCI_FIFO_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x48))
00960 #define MCI_FIFO (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x80))
00961
00962
00963
00964 #define I2S_BASE_ADDR 0xE0088000
00965 #define I2S_DAO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x00))
00966 #define I2S_DAI (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x04))
00967 #define I2S_TX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x08))
00968 #define I2S_RX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x0C))
00969 #define I2S_STATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x10))
00970 #define I2S_DMA1 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x14))
00971 #define I2S_DMA2 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x18))
00972 #define I2S_IRQ (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x1C))
00973 #define I2S_TXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x20))
00974 #define I2S_RXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x24))
00975
00976
00977
00978 #define DMA_BASE_ADDR 0xFFE04000
00979 #define GPDMA_INT_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x000))
00980 #define GPDMA_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x004))
00981 #define GPDMA_INT_TCCLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x008))
00982 #define GPDMA_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x00C))
00983 #define GPDMA_INT_ERR_CLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x010))
00984 #define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x014))
00985 #define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x018))
00986 #define GPDMA_ENABLED_CHNS (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x01C))
00987 #define GPDMA_SOFT_BREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x020))
00988 #define GPDMA_SOFT_SREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x024))
00989 #define GPDMA_SOFT_LBREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x028))
00990 #define GPDMA_SOFT_LSREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x02C))
00991 #define GPDMA_CONFIG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x030))
00992 #define GPDMA_SYNC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x034))
00993
00994
00995 #define GPDMA_CH0_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x100))
00996 #define GPDMA_CH0_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x104))
00997 #define GPDMA_CH0_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x108))
00998 #define GPDMA_CH0_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x10C))
00999 #define GPDMA_CH0_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x110))
01000
01001
01002 #define GPDMA_CH1_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x120))
01003 #define GPDMA_CH1_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x124))
01004 #define GPDMA_CH1_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x128))
01005 #define GPDMA_CH1_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x12C))
01006 #define GPDMA_CH1_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x130))
01007
01008
01009
01010 #define USB_BASE_ADDR 0xFFE0C000
01011
01012
01013 #define USBPortSel (*(volatile unsigned int *)(USB_BASE_ADDR + 0x110))
01014
01015
01016 #define USBClkCtrl (*(volatile unsigned int *)(USB_BASE_ADDR + 0xFF4))
01017 #define USBClkSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0xFF8))
01018
01019
01020 #define USBIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x1C0))
01021 #define USBDevIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x200))
01022 #define USBDevIntEn (*(volatile unsigned int *)(USB_BASE_ADDR + 0x204))
01023 #define USBDevIntClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x208))
01024 #define USBDevIntSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x20C))
01025 #define USBDevIntPri (*(volatile unsigned int *)(USB_BASE_ADDR + 0x22C))
01026
01027
01028 #define USBEpIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x230))
01029 #define USBEpIntEn (*(volatile unsigned int *)(USB_BASE_ADDR + 0x234))
01030 #define USBEpIntClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x238))
01031 #define USBEpIntSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x23C))
01032 #define USBEpIntPri (*(volatile unsigned int *)(USB_BASE_ADDR + 0x240))
01033
01034
01035 #define USBReEp (*(volatile unsigned int *)(USB_BASE_ADDR + 0x244))
01036 #define USBEpInd (*(volatile unsigned int *)(USB_BASE_ADDR + 0x248))
01037 #define USBMaxPSize (*(volatile unsigned int *)(USB_BASE_ADDR + 0x24C))
01038
01039
01040 #define USBRxData (*(volatile unsigned int *)(USB_BASE_ADDR + 0x218))
01041 #define USBRxPLen (*(volatile unsigned int *)(USB_BASE_ADDR + 0x220))
01042 #define USBTxData (*(volatile unsigned int *)(USB_BASE_ADDR + 0x21C))
01043 #define USBTxPLen (*(volatile unsigned int *)(USB_BASE_ADDR + 0x224))
01044 #define USBCtrl (*(volatile unsigned int *)(USB_BASE_ADDR + 0x228))
01045
01046
01047 #define USBCmdCode (*(volatile unsigned int *)(USB_BASE_ADDR + 0x210))
01048 #define USBCmdData (*(volatile unsigned int *)(USB_BASE_ADDR + 0x214))
01049
01050
01051 #define USBDMARSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x250))
01052 #define USBDMARClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x254))
01053 #define USBDMARSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x258))
01054 #define USBUDCAH (*(volatile unsigned int *)(USB_BASE_ADDR + 0x280))
01055 #define USBEpDMASt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x284))
01056 #define USBEpDMAEn (*(volatile unsigned int *)(USB_BASE_ADDR + 0x288))
01057 #define USBEpDMADis (*(volatile unsigned int *)(USB_BASE_ADDR + 0x28C))
01058 #define USBDMAIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x290))
01059 #define USBDMAIntEn (*(volatile unsigned int *)(USB_BASE_ADDR + 0x294))
01060 #define USBEoTIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2A0))
01061 #define USBEoTIntClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2A4))
01062 #define USBEoTIntSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2A8))
01063 #define USBNDDRIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2AC))
01064 #define USBNDDRIntClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2B0))
01065 #define USBNDDRIntSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2B4))
01066 #define USBSysErrIntSt (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2B8))
01067 #define USBSysErrIntClr (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2BC))
01068 #define USBSysErrIntSet (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2C0))
01069
01070
01071 #define MAC_BASE_ADDR 0xFFE00000
01072 #define MAC_MAC1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x000))
01073 #define MAC_MAC2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x004))
01074 #define MAC_IPGT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x008))
01075 #define MAC_IPGR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x00C))
01076 #define MAC_CLRT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x010))
01077 #define MAC_MAXF (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x014))
01078 #define MAC_SUPP (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x018))
01079 #define MAC_TEST (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x01C))
01080 #define MAC_MCFG (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x020))
01081 #define MAC_MCMD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x024))
01082 #define MAC_MADR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x028))
01083 #define MAC_MWTD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x02C))
01084 #define MAC_MRDD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x030))
01085 #define MAC_MIND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x034))
01086
01087 #define MAC_SA0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x040))
01088 #define MAC_SA1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x044))
01089 #define MAC_SA2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x048))
01090
01091 #define MAC_COMMAND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x100))
01092 #define MAC_STATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x104))
01093 #define MAC_RXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x108))
01094 #define MAC_RXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x10C))
01095 #define MAC_RXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x110))
01096 #define MAC_RXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x114))
01097 #define MAC_RXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x118))
01098 #define MAC_TXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x11C))
01099 #define MAC_TXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x120))
01100 #define MAC_TXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x124))
01101 #define MAC_TXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x128))
01102 #define MAC_TXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x12C))
01103
01104 #define MAC_TSV0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x158))
01105 #define MAC_TSV1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x15C))
01106 #define MAC_RSV (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x160))
01107
01108 #define MAC_FLOWCONTROLCNT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x170))
01109 #define MAC_FLOWCONTROLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x174))
01110
01111 #define MAC_RXFILTERCTRL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x200))
01112 #define MAC_RXFILTERWOLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x204))
01113 #define MAC_RXFILTERWOLCLR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x208))
01114
01115 #define MAC_HASHFILTERL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x210))
01116 #define MAC_HASHFILTERH (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x214))
01117
01118 #define MAC_INTSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE0))
01119 #define MAC_INTENABLE (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE4))
01120 #define MAC_INTCLEAR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE8))
01121 #define MAC_INTSET (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFEC))
01122
01123 #define MAC_POWERDOWN (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFF4))
01124 #define MAC_MODULEID (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFFC))
01125
01126
01127 #endif
01128